Understanding and utilizing hardware transactional memory capacity
Author:
Affiliation:
1. Australian National University, Australia
2. Ohio State University, USA
Funder
Australian Research Council
National Science Foundation
Publisher
ACM
Link
https://dl.acm.org/doi/pdf/10.1145/3459898.3463901
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4. Performance evaluation of cache replacement policies for the SPEC CPU2000 benchmark suite
5. Towards an Efficient Pauseless Java GC with Selective HTM-Based Access Barriers
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