Reverse engineering of cache replacement policies in Intel microprocessors and their evaluation
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Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/6832911/6844447/06844475.pdf?arnumber=6844475
Cited by 21 articles. 订阅此论文施引文献 订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献
1. Hardware-Based Implementation of Algorithms for Data Replacement in Cache Memory of Processor Cores;Computers;2024-07-05
2. A Security RISC: Microarchitectural Attacks on Hardware RISC-V CPUs;2023 IEEE Symposium on Security and Privacy (SP);2023-05
3. AutoCAT: Reinforcement Learning for Automated Exploration of Cache-Timing Attacks;2023 IEEE International Symposium on High-Performance Computer Architecture (HPCA);2023-02
4. Microarchitectural Leakage Templates and Their Application to Cache-Based Side Channels;Proceedings of the 2022 ACM SIGSAC Conference on Computer and Communications Security;2022-11-07
5. Understanding I/O Direct Cache Access Performance for End Host Networking;Proceedings of the ACM on Measurement and Analysis of Computing Systems;2022-02-24
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