Sealer: In-SRAM AES for High-Performance and Low-Overhead Memory Encryption-Reference-Cited by-同舟云学术

Sealer: In-SRAM AES for High-Performance and Low-Overhead Memory Encryption

Published:2022-08 Issue: Volume: Page:
ISSN:
Container-title:ACM/IEEE International Symposium on Low Power Electronics and Design
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Author:

Zhang Jingyao¹,Naghibijouybari Hoda²,Sadredini Elaheh¹

Affiliation:

1. University of California, Riverside, United States

2. Binghamton University, United States

Publisher

ACM

Reference21 articles.

1. Shaizeen Aga 2017. Compute Caches. In HPCA. Shaizeen Aga 2017. Compute Caches. In HPCA.

2. Shaizeen Aga and Satish Narayanasamy. 2017. InvisiMem: Smart Memory Defenses for Memory Bus Side Channel. In ISCA. Shaizeen Aga and Satish Narayanasamy. 2017. InvisiMem: Smart Memory Defenses for Memory Bus Side Channel. In ISCA.

3. Shaahin Angizi 2018. PIMA-Logic: A Novel Processing-in-Memory Architecture for Highly Flexible and Energy-Efficient Logic Computation. In DAC. Shaahin Angizi 2018. PIMA-Logic: A Novel Processing-in-Memory Architecture for Highly Flexible and Energy-Efficient Logic Computation. In DAC.

4. Victor Costan and Srinivas Devadas. 2016. Intel SGX explained. Cryptology ePrint Archive(2016). Victor Costan and Srinivas Devadas. 2016. Intel SGX explained. Cryptology ePrint Archive(2016).

5. Xiangyu Dong 2012. Nvsim: A circuit-level performance, energy, and area model for emerging nonvolatile memory . IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems ( 2012 ). Xiangyu Dong 2012. Nvsim: A circuit-level performance, energy, and area model for emerging nonvolatile memory. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (2012).

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