Affiliation:
1. Nazarbayev University, Astana, Republic of Kazakhstan
2. University of Warwick, Coventry, United Kingdom
Abstract
Dynamic and partial reconfiguration are key differentiating capabilities of field programmable gate arrays (FPGAs). While they have been studied extensively in academic literature, they find limited use in deployed systems. We review FPGA reconfiguration, looking at architectures built for the purpose, and the properties of modern commercial architectures. We then investigate design flows and identify the key challenges in making reconfigurable FPGA systems easier to design. Finally, we look at applications where reconfiguration has found use, as well as proposing new areas where this capability places FPGAs in a unique position for adoption.
Publisher
Association for Computing Machinery (ACM)
Subject
General Computer Science,Theoretical Computer Science
Reference165 articles.
1. ReconOS: An Operating System Approach for Reconfigurable Computing
2. Altera. 2013a. Design Planning for Partial Reconfiguration. Altera. Altera. 2013a. Design Planning for Partial Reconfiguration. Altera.
3. Altera. 2013b. Quartus II Handbook Version 13.1. Altera. Altera. 2013b. Quartus II Handbook Version 13.1. Altera.
4. Altera. 2016a. Arria 10 CvP Initialization and Partial Reconfiguration over PCI Express User Guide. Altera. Altera. 2016a. Arria 10 CvP Initialization and Partial Reconfiguration over PCI Express User Guide. Altera.
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