Flexible Updating of Internet of Things Computing Functions through Optimizing Dynamic Partial Reconfiguration

Abstract

With applications to become increasingly compute- and data-intensive requiring more processing power, many internet-of-things (IoT) platforms in robots, drones, and autonomous vehicles which implement neural network inference, cryptographic functions or signal processing (e.g., multimedia, communication), employ field programmable gate arrays (FPGAs). At the same time, dynamic partial reconfiguration (DPR) in modern FPGAs enable changing the function of a part of the FPGA by dynamically loading new bitstreams to the logic regions without affecting the function of other parts of the FPGA. This is especially useful, to update functions of IoT devices while in operation, for bug fixing or functionality adjustments, and more importantly when these IoT devices integrate low-cost FPGAs that can hardly realize many hard accelerators. To deal with one of the major limitations of using partial reconfiguration in IoT devices, this work introduces techniques to flexibly use DPR, namely FLEXDPR, by sharing reconfigurable partitions among different accelerator functions and by supporting virtual relocation of these functions. Experimental results on the Xilinx ZYNQ-7000 platform reveal energy and latency efficiency improvements of, on average, about 20%. Overall, the suggested approach can reduce partial reconfiguration overhead while easing the scheduler’s decisions for the deployment of hardware functions throughout time and space in a performance-conscious manner.