Energy-efficient and reliable 3D network-on-chip (NoC): architectures and optimization algorithms
Author:
Affiliation:
1. Washington State University
2. Duke University
Publisher
ACM
Link
https://dl.acm.org/doi/pdf/10.1145/2966986.2980096
Reference26 articles.
1. Predicting the Performance of a 3D Processor-Memory Chip Stack
2. Networks-on-Chip in a Three-Dimensional Environment: A Performance Evaluation
3. On-chip communication architecture exploration
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1. An efficient NoC router by optimal management of buffer read and write mechanism;Microprocessors and Microsystems;2022-03
2. A Survey of Machine Learning for Computer Architecture and Systems;ACM Computing Surveys;2022-02-03
3. RAMAN: Reinforcement Learning Inspired Algorithm for Mapping Applications onto Mesh Network-on-Chip;2021 ACM/IEEE International Workshop on System Level Interconnect Prediction (SLIP);2021-11
4. A Deep Reinforcement Learning Framework for Architectural Exploration: A Routerless NoC Case Study;2020 IEEE International Symposium on High Performance Computer Architecture (HPCA);2020-02
5. A highly efficient dynamic router for application-oriented network on chip;The Journal of Supercomputing;2018-03-21
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