Author:
Li Jia,Xu Qiang,Hu Yu,Li Xiaowei
Cited by
4 articles.
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1. Minimum Power Test Pattern Generator for Testing VLSI Circuits;2022 6th International Conference on Devices, Circuits and Systems (ICDCS);2022-04-21
2. Automatic Test Pattern Generation;Electronic Design Automation for IC System Design, Verification, and Testing;2016-04-14
3. Scan-Cell Reordering for Minimizing Scan-Shift Power Based on Nonspecified Test Cubes;ACM Transactions on Design Automation of Electronic Systems;2010-11
4. Scan chain configuration based X-filling for low power and high quality testing;IET Computers & Digital Techniques;2010-01-01