Author:
Callegaro Vinicius,Marques Felipe de Souza,Klock Carlos Eduardo,da Rosa Leomar Soares,Ribas Renato P.,Reis André I.
Cited by
6 articles.
订阅此论文施引文献
订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献
1. Explorando a Assimetria do Dimensionamento de Transistores CMOS em Portas Complexas;Revista ComInG - Communications and Innovations Gazette;2023-12-02
2. Electrical and Physical Evaluation of Logic Network Generation Methods for SCCG;2023 IEEE 66th International Midwest Symposium on Circuits and Systems (MWSCAS);2023-08-06
3. Transistor-Level Radiation Hardening by Design Techniques in Complex Gates;Journal of Circuits, Systems and Computers;2022-11-14
4. Transistor Reordering for Electrical Improvement in CMOS Complex Gates;2022 35th SBC/SBMicro/IEEE/ACM Symposium on Integrated Circuits and Systems Design (SBCCI);2022-08-22
5. Standard Cell and Supergates Designs: An Electrical Comparison on 4-Input Logic Functions;2022 IEEE International Symposium on Circuits and Systems (ISCAS);2022-05-28