PRFloor
Author:
Affiliation:
1. National University of Singapore, Singapore, Singapore
2. Technische Universität Dresden, Dresden, Germany
Publisher
ACM
Link
https://dl.acm.org/doi/pdf/10.1145/2847263.2847270
Reference26 articles.
1. Floorplanning for Partially Reconfigurable FPGAs
2. Automatic Floorplanning and Interface Synthesis of Island Style Reconfigurable Systems with GoAhead
3. Automated Resource-Aware Floorplanning of Reconfigurable Areas in Partially-Reconfigurable FPGA Systems
4. Floorplan Design for Multimillion Gate FPGAs
5. Fast floorplanning by look-ahead enabled recursive bipartitioning
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1. ExHiPR: Extended High-level Partial Reconfiguration for Fast Incremental FPGA Compilation;ACM Transactions on Reconfigurable Technology and Systems;2023-09-14
2. HiPR: High-level Partial Reconfiguration for Fast Incremental FPGA Compilation;2022 32nd International Conference on Field-Programmable Logic and Applications (FPL);2022-08
3. Measuring Annotator Agreement Generally across Complex Structured, Multi-object, and Free-text Annotation Tasks;Proceedings of the ACM Web Conference 2022;2022-04-25
4. AM&FT: An Aging Mitigation and Fault Tolerance Framework for SRAM-Based FPGA in Space Applications;Journal of Circuits, Systems and Computers;2022-02-14
5. AMAH-Flex: A Modular and Highly Flexible Tool for Generating Relocatable Systems on FPGAs;2021 International Conference on Field-Programmable Technology (ICFPT);2021-12-06
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