HiPR: High-level Partial Reconfiguration for Fast Incremental FPGA Compilation
Author:
Affiliation:
1. University of Pennsylvania,Dept. of Electrical and Systems Engineering,Philadelphia,PA,USA
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/10035104/10035106/10035173.pdf?arnumber=10035173
Reference54 articles.
1. A Configurable Cloud-Scale DNN Processor for Real-Time AI
2. Serving DNNs in Real Time at Datacenter Scale with Project Brainwave
3. Debugging Support for Pattern-Matching Languages and Accelerators
4. A DSL Compiler for Accelerating Image Processing Pipelines on FPGAs
5. Custom FPGA-based soft-processors for sparse graph acceleration
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