Boolean Satisfiability-Based Routing and Its Application to Xilinx UltraScale Clock Network-Reference-Cited by-同舟云学术

Boolean Satisfiability-Based Routing and Its Application to Xilinx UltraScale Clock Network

Published:2016-02-21 Issue: Volume: Page:
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Container-title:Proceedings of the 2016 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays
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Author:

Fraisse Henri¹,Joshi Abhishek¹,Gaitonde Dinesh¹,Kaviani Alireza¹

Affiliation:

1. Xilinx Inc., San Jose, CA, USA

Publisher

ACM

Link

https://dl.acm.org/doi/pdf/10.1145/2847263.2847342

Reference22 articles.

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2. N. Eïn and N. Sïrensson . An extensible sat-solver. In E. Giunchiglia and A. Tacchella editors Theory and Applications of Satisfiability Testing volume 2919 of Lecture Notes in Computer Science pages 502 -- 518 . Springer Berlin Heidelberg 2004 . N. Eïn and N. Sïrensson. An extensible sat-solver. In E. Giunchiglia and A. Tacchella editors Theory and Applications of Satisfiability Testing volume 2919 of Lecture Notes in Computer Science pages 502--518. Springer Berlin Heidelberg 2004.

3. E. Goldberg M. R. Prasad and R. K. Brayton. Using sat for combinational equivalence checking 2001. E. Goldberg M. R. Prasad and R. K. Brayton. Using sat for combinational equivalence checking 2001.

4. Combined Architecture/Algorithm Approach to Fast FPGA Routing

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