Combined Architecture/Algorithm Approach to Fast FPGA Routing

Author:

Gort Marcel,Anderson Jason H.

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering,Hardware and Architecture,Software

Cited by 12 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. A Fast FPGA Connection Router Using Prerouting-Based Parallel Local Routing Algorithm;IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems;2023-11

2. Tear Down The Wall: Unified and Efficient Intra-and Inter-Cluster Routing for FPGAs;2023 33rd International Conference on Field-Programmable Logic and Applications (FPL);2023-09-04

3. Accelerating FPGA Routing Through Algorithmic Enhancements and Connection-aware Parallelization;ACM Transactions on Reconfigurable Technology and Systems;2020-10

4. CRoute: A Fast High-Quality Timing-Driven Connection-Based FPGA Router;2019 IEEE 27th Annual International Symposium on Field-Programmable Custom Computing Machines (FCCM);2019-04

5. A SAT-based Timing Driven Place and Route Flow for Critical Soft IP;2018 28th International Conference on Field Programmable Logic and Applications (FPL);2018-08

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