The Acceleration Techniques for the Modified Pathfinder Routing Algorithm on an Island-Style FPGA

Author:

Zapletina Mariya A.1,Zheleznikov Daniil A.1

Affiliation:

1. Institute for Design Problems in Microelectronics of RAS,Electronic Design Automation Department,Moscow,Russia

Publisher

IEEE

Reference30 articles.

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2. An FPGA routing algorithm to improve efficiency and quality;Third International Conference on Advanced Algorithms and Signal Image Processing (AASIP 2023);2023-10-10

3. A Survey on FPGA-Based Heterogeneous Clusters Architectures;IEEE Access;2023

4. Backpass Trees for Modifying PathFinder-based Routing Algorithm for FPGA;2022 IEEE International Multi-Conference on Engineering, Computer and Information Sciences (SIBIRCON);2022-11-11

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