Optimal Circuits for Streamed Linear Permutations Using RAM-Reference-Cited by-同舟云学术

Optimal Circuits for Streamed Linear Permutations Using RAM

Published:2016-02-21 Issue: Volume: Page:
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Container-title:Proceedings of the 2016 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays
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Author:

Serre François¹,Holenstein Thomas¹,Püschel Markus¹

Affiliation:

1. ETH Zurich, Zurich, Switzerland

Publisher

ACM

Link

https://dl.acm.org/doi/pdf/10.1145/2847263.2847277

Reference20 articles.

1. Systematic synthesis of DSP data format converters using life-time analysis and forward-backward register allocation

2. Permuting streaming data using RAMs

3. M. Püschel P. A. Milder and J. C. Hoe "System and method for designing architecture for specified permutation and datapath circuits for permutation " 2008. US Patent 8 321 823. M. Püschel P. A. Milder and J. C. Hoe "System and method for designing architecture for specified permutation and datapath circuits for permutation " 2008. US Patent 8 321 823.

4. Computer Generation of Hardware for Linear Digital Signal Processing Transforms

5. R. Chen S. Siriyal and V. Prasanna "Energy and memory efficient mapping of bitonic sorting on FPGA " in International Symposium on Field-Programmable Gate Arrays (FPGA) pp. 240--249 2015. 10.1145/2684746.2689068 R. Chen S. Siriyal and V. Prasanna "Energy and memory efficient mapping of bitonic sorting on FPGA " in International Symposium on Field-Programmable Gate Arrays (FPGA) pp. 240--249 2015. 10.1145/2684746.2689068

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