Energy and Memory Efficient Mapping of Bitonic Sorting on FPGA-Reference-Cited by-同舟云学术

Energy and Memory Efficient Mapping of Bitonic Sorting on FPGA

Published:2015-02-22 Issue: Volume: Page:
ISSN:
Container-title:Proceedings of the 2015 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays
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Author:

Chen Ren¹,Siriyal Sruja¹,Prasanna Viktor¹

Affiliation:

1. University of Southern California, Los Angeles, CA, USA

Funder

National Science Foundation

Defense Advanced Research Projects Agency

Publisher

ACM

Link

https://dl.acm.org/doi/pdf/10.1145/2684746.2689068

Reference28 articles.

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3. XST user guide for Virtex-6 Spartan-6 and 7 series devices. http://www.xilinx.com/support/documentation. XST user guide for Virtex-6 Spartan-6 and 7 series devices. http://www.xilinx.com/support/documentation.

4. An 0(n log n) sorting network

5. FlexGrip: A soft GPGPU for FPGAs

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