Low power realization of finite state machines—a decomposition approach

Author:

Chow Sue-Hong1,Ho Yi-Cheng1,Hwang TingTing1,Liu C. L.2

Affiliation:

1. Tsing Hua Univ., Taiwan

2. Univ. of Illinois at Urbana-Champaign, Urbana

Abstract

We present in this article a new approach to the synthesis problem for finite state machines with the reduction of power dissipation as a design objective. A finite state machine is decomposed into a number of coupled submachines. Most of the time, only one of the submachines will be activated which, consequently, could lead to substantial savings in power consumption. The key steps in our approach are: (1) decomposition of a finite state machine into submachines so that there is a high probability that state transitions will be confined to the smaller of the submachines most of the time, and (2) synthesis of the coupled submachines to optimize the logic circuits. Experimental results confirmed that our approach produced very good results (in particular, for finite state machines with a large number of states.)

Publisher

Association for Computing Machinery (ACM)

Subject

Electrical and Electronic Engineering,Computer Graphics and Computer-Aided Design,Computer Science Applications

Reference17 articles.

1. State assignment for low power dissipation;BENINI L.;IEEE J. Solid State Circuits,1995

2. Low-power CMOS digital design;CHANDRAKASAN A. P.;IEEE J. Solid-State Circuits,1992

3. MUSTANG: State assignment of finite state machines targeting multilevel logic implementations;DEVADAS S.;IEEE Trans. CAD,1991

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