Finite-State-Machine Overlay Architectures for Fast FPGA Compilation and Application Portability

Author:

Cooke Patrick1,Hao Lu1,Stitt Greg1

Affiliation:

1. University of Florida, Gainesville, FL

Abstract

Despite significant advantages, wider usage of field-programmable gate arrays (FPGAs) has been limited by lengthy compilation and a lack of portability. Virtual-architecture overlays have partially addressed these problems, but previous work focuses mainly on heavily pipelined applications with minimal control requirements. We expand previous work by enabling more flexible control via overlay architectures for finite-state machines. Although not appropriate for control-intensive circuits, the presented architectures reduced compilation times of control changes in a convolution case study from 7 hours to less than 1 second, with no performance overhead and an area overhead of 0.2%.

Funder

National Science Foundation

the I/UCRC Program of the National Science Foundation

Publisher

Association for Computing Machinery (ACM)

Subject

Hardware and Architecture,Software

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