Integrated predicated and speculative execution in the IMPACT EPIC architecture
Author:
Affiliation:
1. Center for Reliable and High-Performance Computing, University of Illinois Urbana-Champaign, IL
2. Hewlett-Packard Laboratories, Hewlett-Packard, Palo Alto, CA
Abstract
Publisher
Association for Computing Machinery (ACM)
Link
https://dl.acm.org/doi/pdf/10.1145/279361.279391
Reference20 articles.
1. Conversion of control dependence to data dependence
2. A VLIW architecture for a trace scheduling compiler
3. The i486 CPU: executing instructions in one clock cycle
4. Superscalar instruction execution in the 21164 Alpha microprocessor
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1. Using the SSA-Form in a Code Generator;Lecture Notes in Computer Science;2014
2. Branch Predication;Speculative Execution in High Performance Computer Architectures;2005-05-26
3. Field-testing IMPACT EPIC research results in Itanium 2;ACM SIGARCH Computer Architecture News;2004-03-02
4. Exploiting Free Execution Slots on EPIC Processors for Efficient and Accurate Runtime Profiling;Advances in Computer Systems Architecture;2004
5. Retargetable Very Long InstructionWord Compiler Framework for Digital Signal Processors;The Compiler Design Handbook;2002-09-25
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