Design automation for adiabatic circuits

Author:

Zulehner Alwin1,Frank Michael P.2,Wille Robert1

Affiliation:

1. Johannes Kepler University Linz, Austria

2. Sandia National Laboratories

Publisher

ACM

Reference19 articles.

1. Semiconductor Industry Association 2.0. 2015. International Technology Road-map for Semiconductors. https://www.semiconductors.org/main/2015_international_technology_roadmap_for_semiconductors_itrs. Accessed: 2017-09-15. Semiconductor Industry Association 2.0. 2015. International Technology Road-map for Semiconductors. https://www.semiconductors.org/main/2015_international_technology_roadmap_for_semiconductors_itrs. Accessed: 2017-09-15.

2. Venkiteswaran Anantharam Maojiao He Krishna Natarajan Huikai Xie and Michael P Frank. 2004. Driving Fully-Adiabatic Logic Circuits Using Custom High-Q MEMS Resonators.. In ESA/VLSI. 5--11. Venkiteswaran Anantharam Maojiao He Krishna Natarajan Huikai Xie and Michael P Frank. 2004. Driving Fully-Adiabatic Logic Circuits Using Custom High-Q MEMS Resonators.. In ESA/VLSI. 5--11.

3. Robert K. Brayton and Alan Mishchenko. 2010. ABC: An Academic Industrial-Strength Verification Tool. In Computer Aided Verification. 24--40. 10.1007/978-3-642-14295-6_5 Robert K. Brayton and Alan Mishchenko. 2010. ABC: An Academic Industrial-Strength Verification Tool. In Computer Aided Verification. 24--40. 10.1007/978-3-642-14295-6_5

4. F. Brglez D. Bryan and K. Kozminski. 1989. Combinational Profiles of Sequential Benchmark Circuits. In Int'l Symp. Circ. and Systems. 1929--1934. F. Brglez D. Bryan and K. Kozminski. 1989. Combinational Profiles of Sequential Benchmark Circuits. In Int'l Symp. Circ. and Systems. 1929--1934.

5. Michael P. Frank. 2003. Common Mistakes in Adiabatic Logic Design and How to Avoid Them. In Int'l Conf. on Embedded Systems and Applications. 216--222. Michael P. Frank. 2003. Common Mistakes in Adiabatic Logic Design and How to Avoid Them. In Int'l Conf. on Embedded Systems and Applications. 216--222.

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