Author:
Brayton Robert,Mishchenko Alan
Publisher
Springer Berlin Heidelberg
Reference37 articles.
1. Baumgartner, J., Kuehlmann, A.: Min-area retiming on flexible circuit structures. In: Proc. ICCAD ’01, pp. 176–182 (2001)
2. Baumgartner, J., Mony, H., Paruthi, V., Kanzelman, R., Janssen, G.: Scalable sequential equivalence checking across arbitrary design transformations. In: Proc. ICCD ’06 (2006)
3. Berkeley Verification and Synthesis Research Center (BVSRC), http://www.bvsrc.org
4. Biere, A.: AIGER: A format for And-Inverter Graphs, http://fmv.jku.at/aiger/
5. Bjesse, P., Boralv, A.: DAG-aware circuit compression for formal verification. In: Proc. ICCAD ’04, pp. 42–49 (2004)
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