Exploiting Reversible Computing for Verification

Author:

Burgholzer Lukas1,Wille Robert2

Affiliation:

1. Johannes Kepler University Linz, Austria

2. Technical University of Munich, Germany

Funder

European Research Council

Publisher

ACM

Reference38 articles.

1. R. Wille , " SMT-based stimuli generation in the SystemC Verification library," in Forum on Specification and Design Languages , 2009 . R. Wille et al., "SMT-based stimuli generation in the SystemC Verification library," in Forum on Specification and Design Languages, 2009.

2. N. Kitchen and A. Kuehlmann , " Stimulus generation for constrained random simulation," in Int'l Conf. on CAD , 2007 . N. Kitchen and A. Kuehlmann, "Stimulus generation for constrained random simulation," in Int'l Conf. on CAD, 2007.

3. T. Zhang , D. Saab , and J. A. Abraham , " Automatic assertion generation for simulation, formal verification and emulation," in IEEE Annual Symp. on VLSI , 2017 . T. Zhang, D. Saab, and J. A. Abraham, "Automatic assertion generation for simulation, formal verification and emulation," in IEEE Annual Symp. on VLSI, 2017.

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