Physical Design Considerations for Synthesizable Standard-Cell-Based FPGAs-Reference-Cited by-同舟云学术

Physical Design Considerations for Synthesizable Standard-Cell-Based FPGAs

Published:2019 Issue: Volume: Page:
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Container-title:Proceedings of the 10th International Symposium on Highly-Efficient Accelerators and Reconfigurable Technologies - HEART 2019
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Author:

Grady Brett¹,Anderson Jason H.¹

Affiliation:

1. University of Toronto

Publisher

ACM Press

Reference13 articles.

1. J. H. Kim and J. H. Anderson, "Synthesizable Standard Cell FPGA Fabrics Targetable by the Verilog-to-Routing CAD Flow," ACM TRETS, vol. 10, no. 2, pp. 11:1--11:23, 2017.

2. V. Aken'Ova and R. Saleh, "A "soft++" eFPGA Physical Design Approach with Case Studies in 180nm and 90nm," in IEEE Computer Society Symp. on VLSI, 2006.

3. S.J. E. Wilton, C. H. Ho, P. H. W. Leong, W. Luk, and B. Quinton, "A Synthesizable Datapath-Oriented Embedded FPGA Fabric," in ACM FPGA, pp. 33--41, 2007.

4. A. Yan and S. Wilton, "Sequential Synthesizable Embedded Programmable Logic Cores for System-on-Chip," in IEEE CICC, pp. 435--438, 2004.

5. C. C. Wang, F. Yuan, T. Yu, and D. Markovic, "A Multi-Granularity FPGA with Hierarchical Interconnects for Efficient and Flexible Mobile Computing," in ISSCC, pp. 460--461, 2014.

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