Author:
Yim Joon-Seo,Bae Seong-Ok,Kyung Chong-Min
Cited by
6 articles.
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1. Optimizing Design Power Integrity using IR-Aware Placement;2022 37th International Technical Conference on Circuits/Systems, Computers and Communications (ITC-CSCC);2022-07-05
2. Efficient power pad assignment for multi-voltage SoC and its application in floorplanning;International Journal of Circuit Theory and Applications;2015-11-13
3. Simple Analytical Formulas for Estimating IR-Drops in an Early Design Stage;IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences;2010
4. Physical design method of MPSoC;Journal of Zhejiang University-SCIENCE A;2007-04
5. A Floorplan-Based Power Network Analysis Methodology for System-on-Chip Designs;Embedded and Ubiquitous Computing