A performance comparison of contemporary DRAM architectures

Author:

Cuppu Vinodh1,Jacob Bruce1,Davis Brian2,Mudge Trevor2

Affiliation:

1. Dept. of Electrical & Computer Engineering, University of Maryland, College Park

2. Dept. of Electrical Engineering & Computer Science, University of Michigan, Ann Arbor

Abstract

In response to the growing gap between memory access time and processor speed, DRAM manufacturers have created several new DRAM architectures. This paper presents a simulation-based performance study of a representative group, each evaluated in a small system organization. These small-system organizations correspond to workstation-class computers and use on the order of 10 DRAM chips. The study covers Fast Page Mode, Extended Data Out, Synchronous, Enhanced Synchronous, Synchronous Link, Rambus, and Direct Rambus designs. Our simulations reveal several things: (a) current advanced DRAM technologies are attacking the memory bandwidth problem but not the latency problem; (b) bus transmission speed will soon become a primary factor limiting memory-system performance; (c) the post-L2 address stream still contains significant locality, though it varies from application to application; and (d) as we move to wider buses, row access time becomes more prominent, making it important to investigate techniques to exploit the available locality to decrease access time.

Publisher

Association for Computing Machinery (ACM)

Cited by 58 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. MobileNets Can Be Lossily Compressed: Neural Network Compression for Embedded Accelerators;Electronics;2022-03-09

2. Exploiting Long-Distance Interactions and Tolerating Atom Loss in Neutral Atom Quantum Architectures;2021 ACM/IEEE 48th Annual International Symposium on Computer Architecture (ISCA);2021-06

3. DTRNG: Low Cost and Robust True Random Number Generator Using DRAM Weak Write Scheme;2021 IEEE International Symposium on Circuits and Systems (ISCAS);2021-05

4. A Bus Authentication and Anti-Probing Architecture Extending Hardware Trusted Computing Base Off CPU Chips and Beyond;2020 ACM/IEEE 47th Annual International Symposium on Computer Architecture (ISCA);2020-05

5. Mocktails: Capturing the Memory Behaviour of Proprietary Mobile Architectures;2020 ACM/IEEE 47th Annual International Symposium on Computer Architecture (ISCA);2020-05

同舟云学术

1.学者识别学者识别

2.学术分析学术分析

3.人才评估人才评估

"同舟云学术"是以全球学者为主线,采集、加工和组织学术论文而形成的新型学术文献查询和分析系统,可以对全球学者进行文献检索和人才价值评估。用户可以通过关注某些学科领域的顶尖人物而持续追踪该领域的学科进展和研究前沿。经过近期的数据扩容,当前同舟云学术共收录了国内外主流学术期刊6万余种,收集的期刊论文及会议论文总量共计约1.5亿篇,并以每天添加12000余篇中外论文的速度递增。我们也可以为用户提供个性化、定制化的学者数据。欢迎来电咨询!咨询电话:010-8811{复制后删除}0370

www.globalauthorid.com

TOP

Copyright © 2019-2024 北京同舟云网络信息技术有限公司
京公网安备11010802033243号  京ICP备18003416号-3