Physical Design Considerations of One-level RRAM-based Routing Multiplexers

Author:

Tang Xifan1,Giacomin Edouard2,De Micheli Giovanni1,Gaillardon Pierre-Emmanuel2

Affiliation:

1. EPFL, Lausanne, Switzerland

2. University of Utah, Salt Lake City, UT, USA

Funder

Swiss National Science Foundation

Publisher

ACM

Cited by 6 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. ADC-Less Reprogrammable RRAM Array Architecture for In-Memory Computing;IEEE Transactions on Very Large Scale Integration (VLSI) Systems;2023-12

2. Exploring the NBTI Aging and PVT effects on RRAM-based FPGA Multiplexers Performance;2023 IEEE International Integrated Reliability Workshop (IIRW);2023-10-08

3. Process-Voltage-Temperature Variations Assessment in Energy-Aware Resistive RAM-Based FPGAs;IEEE Transactions on Device and Materials Reliability;2023-09

4. Variation Tolerant RRAM Based Synaptic Architecture for On-Chip Training;IEEE Transactions on Nanotechnology;2023

5. Exploring Process-Voltage-Temperature Variations Impact on 4T1R Multiplexers for Energy-aware Resistive RAM-based FPGAs;2022 IEEE International Integrated Reliability Workshop (IIRW);2022-10-09

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