LRU-based column-associative caches

Author:

Chung Byung-Kwon1,Peir Jih-Kwon1

Affiliation:

1. Department of Computer & Information, Science & Engineering, University of Florida, Gainesville, FL

Abstract

The column-associative cache is a direct-mapped cache that may be accessed more than once, each time with a different hash function, to satisfy a memory request. In the column-associative cache, the possible locations that a line can reside in defines the column. The original scheme relies on a rehash bit array to guide the replacement policy within the column. A subsequent proposal uses an index vector to speed up the cache search within the column. In this paper, we consider the idea of using the Least-Recently-Used (LRU) information to guide both the replacement policy and the search order. Results from trace-driven simulations using the SPEC95 benchmark suite show that the LRU-based scheme can achieve better or at least comparable performance.

Publisher

Association for Computing Machinery (ACM)

Cited by 5 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. Adaptive Selection of Cache Indexing Bits for Removing Conflict Misses;IEEE Transactions on Computers;2014

2. Reducing cache misses through programmable decoders;ACM Transactions on Architecture and Code Optimization;2008-01

3. Balanced Cache;ACM SIGARCH Computer Architecture News;2006-05

4. Capturing dynamic memory reference behavior with adaptive cache topology;ACM SIGOPS Operating Systems Review;1998-12

5. Capturing dynamic memory reference behavior with adaptive cache topology;ACM SIGPLAN Notices;1998-11

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