Capturing dynamic memory reference behavior with adaptive cache topology
Author:
Affiliation:
1. Computer & Information Science & Engineering Department, University of Florida, Gainesville, FL
2. Computer Science Division, University of California, Berkeley, CA
Abstract
Publisher
Association for Computing Machinery (ACM)
Link
https://dl.acm.org/doi/pdf/10.1145/384265.291053
Reference28 articles.
1. Cache performance of operating system and multiprogramming workloads
2. Column-associative caches
3. Cache design of a sub-micron CMOS system/370
4. LRU-based column-associative caches
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1. Cache Memory and On-Chip Cache Architecture: A Survey;Communications in Computer and Information Science;2024
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