Adaptive Thermal Management for 3D ICs with Stacked DRAM Caches-Reference-Cited by-同舟云学术

Adaptive Thermal Management for 3D ICs with Stacked DRAM Caches

Published:2017-06-18 Issue: Volume: Page:
ISSN:
Container-title:Proceedings of the 54th Annual Design Automation Conference 2017
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Author:

Li Dawei¹,Zhang Kaicheng¹,Guliani Akhil¹,Ogrenci-Memik Seda¹

Affiliation:

1. Department of EECS, Northwestern University

Funder

U.S. Department of Energy

National Science Foundation

Publisher

ACM

Link

https://dl.acm.org/doi/pdf/10.1145/3061639.3062197

Reference23 articles.

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2. Tezzaron Semiconductor "Octopus 8-port DRAM for die-stack applications" May 2010. Tezzaron Semiconductor "Octopus 8-port DRAM for die-stack applications" May 2010.

3. A methodology for power characterization of associative memories

4. L.-N. Tran etal "Heterogeneous Memory Management for 3D-DRAM external DRAM with QoS" IEEE ASP-DAC 2013. L.-N. Tran et al. "Heterogeneous Memory Management for 3D-DRAM external DRAM with QoS" IEEE ASP-DAC 2013.

5. 3D-Stacked Memory Architectures for Multi-core Processors

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