Efficient Bayesian Yield Optimization Approach for Analog and SRAM Circuits
Author:
Affiliation:
1. State Key Lab of ASIC & System, Microelectronics Department, Fudan University, China
2. Shanghai High Performance Integrated Circuit Design Center, China
Funder
Chen Guang project supported by Shanghai Munici- pal Education Commission and Shanghai Education Develop- ment Foundation
National Natural Science Foundation of China
Recruitment Program of Global Experts (the Thousand Talents Plan)
Publisher
ACM
Link
https://dl.acm.org/doi/pdf/10.1145/3061639.3062234
Reference21 articles.
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2. Manuel Barros Jorge Guilherme and Nuno Horta. 2010. Analog circuits optimization based on evolutionary computation techniques. INTEGRATION the VLSI journal 43 1 (2010) 136--155. 10.1016/j.vlsi.2009.09.001 Manuel Barros Jorge Guilherme and Nuno Horta. 2010. Analog circuits optimization based on evolutionary computation techniques. INTEGRATION the VLSI journal 43 1 (2010) 136--155. 10.1016/j.vlsi.2009.09.001
3. Variation-Aware Macromodeling and Synthesis of Analog Circuits Using Spline Center and Range Method and Dynamically Reduced Design Space
4. Christopher M Bishop. 2006. Pattern recognition. Machine Learning 128 (2006). Christopher M Bishop. 2006. Pattern recognition. Machine Learning 128 (2006).
5. Automated synthesis of complex analog circuits
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