Author:
Wang Qi,Vrudhula Sarma B. K.
Cited by
11 articles.
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1. Leakage Reduction by Integrating IVC and ALS Technique in 65 nm CMOS One Bit Adder Circuit;Emerging Research in Computing, Information, Communication and Applications;2015
2. Bridging high performance and low power in processor design;Proceedings of the 2014 international symposium on Low power electronics and design;2014-08-11
3. Various Low Power Approaches in CMOS Vlsi Circuits;Proceedings of the 2014 International Conference on Information and Communication Technology for Competitive Strategies - ICTCS '14;2014
4. Combined heuristics for synthesis of SOCs with time and power constraints;Computers & Electrical Engineering;2012-11
5. Novel Voltage Choice and Min-Cut Based Assignment for Dual-VDD System;IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences;2012