A ferroelectric FET based power-efficient architecture for data-intensive computing

Author:

Long Yun1,Na Taesik1,Rastogi Prakshi1,Rao Karthik1,Khan Asif Islam1,Yalamanchili Sudhakar1,Mukhopadhyay Saibal1

Affiliation:

1. Georgia Institute of Technology

Publisher

ACM

Cited by 12 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. CoMN: Algorithm-Hardware Co-Design Platform for Nonvolatile Memory-Based Convolutional Neural Network Accelerators;IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems;2024-07

2. Utilizing Dual-Port FeFETs for Energy-Efficient Binary Neural Network Inference Accelerators;IEEE Transactions on Electron Devices;2024-07

3. A Convolution Neural Network Accelerator Design with Weight Mapping and Pipeline Optimization;2023 60th ACM/IEEE Design Automation Conference (DAC);2023-07-09

4. Efficient Implementation of Max-Pooling Algorithm Exploiting History-Effect in Ferroelectric-FinFETs;IEEE Transactions on Electron Devices;2022-11

5. In-Memory Multi-Bit Multiplication and Accumulation (MAC) Using FeFET for Energy Efficient IoT;2022 2nd International Conference on Intelligent Technology and Embedded Systems (ICITES);2022-09-23

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