A Dynamically Reconfigurable RF NoC for Many-Core
Author:
Affiliation:
1. Sorbonne Universités, UPMC Univ Paris 06, UMR 7606, LIP6, Paris, France
2. Supélec - IETR, Cesson-Sevigne, France
Funder
Agence Nationale de la Recherche
Publisher
ACM
Link
https://dl.acm.org/doi/pdf/10.1145/2742060.2742082
Reference23 articles.
1. Statistical physics approaches for network-on-chip traffic characterization
2. RF/wireless interconnect for inter- and intra-chip communications
3. CMOS compatible many-core noc architectures with multi-channel millimeter-wave wireless links
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1. An improved hybrid network‐on‐chip with flexible topology and frugal routing;The Journal of Engineering;2024-06
2. Adaptive Routing for Hybrid Photonic–Plasmonic (HyPPI) Interconnection Network for Manycore Processors Using DDDAS on the Chip;Handbook of Dynamic Data Driven Applications Systems;2023
3. Scalable THz Network-On-Chip Architecture for Multichip Systems;Journal of Computer Networks and Communications;2020-12-10
4. A 1000× Improvement of the Processor-Memory Gap;The Frontiers Collection;2020
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