Unlocking wordline-level parallelism for fast inference on RRAM-based DNN accelerator

Author:

Park Yeonhong1,Lee Seung Yul1,Shin Hoon1,Heo Jun1,Ham Tae Jun1,Lee Jae W.1

Affiliation:

1. Seoul National University

Funder

Ministry of Science, ICT and Future Planning

Publisher

ACM

Cited by 7 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. ISSA: Architecting CNN Accelerators Using Input-Skippable, Set-Associative Computing-in-Memory;IEEE Transactions on Computers;2024-09

2. VECOM: Variation-Resilient Encoding and Offset Compensation Schemes for Reliable ReRAM-Based DNN Accelerator;2023 IEEE/ACM International Conference on Computer Aided Design (ICCAD);2023-10-28

3. Framework and Quantization Method Design for CIM;2023 International Conference on Consumer Electronics - Taiwan (ICCE-Taiwan);2023-07-17

4. CorcPUM: Efficient Processing Using Cross-Point Memory via Cooperative Row-Column Access Pipelining and Adaptive Timing Optimization in Subarrays;2023 60th ACM/IEEE Design Automation Conference (DAC);2023-07-09

5. ISSA;Proceedings of the 41st IEEE/ACM International Conference on Computer-Aided Design;2022-10-30

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