Area, Delay and Power Comparison of Adder Topologies

Author:

R Uma

Publisher

Academy and Industry Research Collaboration Center (AIRCC)

Subject

General Materials Science

Cited by 23 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

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2. Gecikme, alan, güç ve enerji açısından hibrit paralel toplayıcılar için karşılaştırmalı bir performans değerlendirmesi;Gazi Üniversitesi Mühendislik Mimarlık Fakültesi Dergisi;2023-04-12

3. An Efficient VLSI Architecture for Analysis of Area, Delay and Power Consumption-A Review;2023 2nd International Conference for Innovation in Technology (INOCON);2023-03-03

4. Design and Implementation of Area Efficient 16-bit Carry Skip Adder;international journal of engineering technology and management sciences;2023

5. Comparative and Robustness Study of 3-Bit Adder;Lecture Notes in Electrical Engineering;2023

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