1. Band structure, deformation potentials, and carrier mobility in strained Si, Ge, and SiGe alloys
2. K. Ota, K. Sugihara, H. Sayama, T. Uchida, H. Oda, T. Eimori, H. Morimoto, Y. Inoue, Novel locally strained channel technique for high performance 55nm CMOS, Presented at IEDM, 2002.
3. C.-H. Ge, C.-C. Lin, C.-H. Ko, C.-C. Huang, Y.-C. Huang, B.-W. Chan, B.-C. Perng, C.-C. Sheu, P.-Y. Tsai, L.-G. Yao, C.-L. Wu, T.-L. Lee, C.-J. Chen, C.-T. Wang, S.-C. Lin, Y.-C. Yeo, C. Hu, Process-strained Si (PSS) CMOS technology featuring 3-D strain engineering, Presented at IEDM, 2003.
4. High-performance nMOSFETs using a novel strained Si/SiGe CMOS architecture
5. Thick-Strained-Si/Relaxed-SiGe Structure of High-Performance RF Power LDMOSFETs for Cellular Handsets