Low power and high performance dynamic CMOS XOR/XNOR gate design-Reference-Cited by-同舟云学术

Low power and high performance dynamic CMOS XOR/XNOR gate design

Published:2011-08 Issue:8 Volume:88 Page:2781-2784
ISSN:0167-9317
Container-title:Microelectronic Engineering
language:en
Short-container-title:Microelectronic Engineering

Author:

Wang Jinhui,Gong Na,Hou Ligang,Peng Xiaohong,Geng Shuqin,Wu Wuchen

Funder

Startup Foundation for Doctors of BJUT

National Natural Science Foundation of China

Publisher

Elsevier BV

Subject

Electrical and Electronic Engineering,Surfaces, Coatings and Films,Condensed Matter Physics,Atomic and Molecular Physics, and Optics,Electronic, Optical and Magnetic Materials

Reference18 articles.

1. A 65 nm 2-Billion Transistor Quad-Core Itanium Processor

2. A 320 mV 56 μW 411 GOPS/Watt Ultra-Low Voltage Motion Estimation Accelerator in 65 nm CMOS

3. XNOR-based double-edge-triggered flip-flop for two-phase pipelines

4. New efficient designs for XOR and XNOR functions on the transistor level

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