High-temperature performance of state-of-the-art triple-gate transistors-Reference-Cited by-同舟云学术

High-temperature performance of state-of-the-art triple-gate transistors

Published:2007-12 Issue:12 Volume:47 Page:2065-2069
ISSN:0026-2714
Container-title:Microelectronics Reliability
language:en
Short-container-title:Microelectronics Reliability

Author:

Akarvardar K.,Mercha A.,Simoen E.,Subramanian V.,Claeys C.,Gentil P.,Cristoloveanu S.

Publisher

Elsevier BV

Subject

Electrical and Electronic Engineering,Surfaces, Coatings and Films,Safety, Risk, Reliability and Quality,Condensed Matter Physics,Atomic and Molecular Physics, and Optics,Electronic, Optical and Magnetic Materials

Reference20 articles.

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2. Lemme M, Mollenhauer T, Henschel W, Wahlbrinkl T, Gottlob H, Efavil J. Subthreshold characteristics of p-type triple-gate MOSFETs. In: Proc ESSDERC, 2003. p. 123–6.

3. Collaert N, Demand M, Ferain I, Lisoni J, Singanamalla R, Zimmerman P, et al. Tall triple-gate devices with TiN/HfO2 gate stack. In: Tech Dig, VLSI Technology Symposium, 2005. p. 108–9.

4. A new ‘shift and ratio’ method for MOSFET channel-length extraction;Taur;IEEE Electron Dev Lett,1992

5. MOSFET inversion layer mobilities – a physically based semi-empirical model for a wide temperature range;Jeon;IEEE Trans Electron Dev,1989

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