Author:
Kwon YongHyuk,Bang HeeSeon,Joo SungMin,Bang HanSur
Subject
Electrical and Electronic Engineering,Surfaces, Coatings and Films,Safety, Risk, Reliability and Quality,Condensed Matter Physics,Atomic and Molecular Physics, and Optics,Electronic, Optical and Magnetic Materials
Reference19 articles.
1. Swinnen B. Requiring more than 3 dimensions from concept to product. In: Proc IITC conf; 2009. p. 59–62.
2. Three-dimensional system-in-package using stacked silicon platform technology;Kripesh;Trans Adv Pack,2005
3. Zheng J, Zhang Z, Chen Y, Shi J. 3D stacked package technology and its application prospects. In: Proc new trends in information and service science conf; 2009, p. 528–33.
4. Yano Y, Sugiyama T, Ishihara S, Fukui Y, Juso H, Miyata K, Sota Y, Fujita K. Three-dimensional very thin stacked packaging technology for SiP. In: Proc electronic components and technology conf; 2002, p. 1329–34.
5. Lee HC, Chang YW, Lee PW. Recent research development in flip-chip routing. In: Proc ICCAD conf; 2010, p. 404–10.
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