Parametric study on flip chip package with lead-free solder joints by using the probabilistic designing approach-Reference-Cited by-同舟云学术

Parametric study on flip chip package with lead-free solder joints by using the probabilistic designing approach

Published:2004-12 Issue:12 Volume:44 Page:1947-1955
ISSN:0026-2714
Container-title:Microelectronics Reliability
language:en
Short-container-title:Microelectronics Reliability

Author:

Yang D.G.,Liang J.S.,Li Q.Y.,Ernst L.J.,Zhang G.Q.

Publisher

Elsevier BV

Subject

Electrical and Electronic Engineering,Surfaces, Coatings and Films,Safety, Risk, Reliability and Quality,Condensed Matter Physics,Atomic and Molecular Physics, and Optics,Electronic, Optical and Magnetic Materials

Reference10 articles.

1. Investigation on flip chip solder fatigue with cure-dependent underfil properties;Yang;IEEE Trans. Compon. Packag. Technol,2003

2. Qian Z et al. Fatigue life prediction of flip-chips in terms of nonlinear behaviors of solder and underfill. In: Proc 49th International Conference ECTC, 1999

3. Modelling and analysis of 96.5Sn–3.5Ag lead-free solder joints of wafer level chip scale package on buildup microvia circuit board;Lau John;IEEE Trans. Electron. Packag. Manufact,2002

4. ANSYS User's Manual, Release 5.7, 2001

5. Lin JK et al. Characterization of lead-free solders and under bump metallurgies for flip-chip packages. In: Proc 51st Electronic Components and Technology Conference (ECTC), USA, 2001

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