Determination of DC equivalent hot carrier stress times in scaled CMOS devices using novel AC stress methodology

Author:

Kerber AndreasORCID,Nigam Tanya

Publisher

Elsevier BV

Subject

Electrical and Electronic Engineering,Surfaces, Coatings and Films,Safety, Risk, Reliability and Quality,Condensed Matter Physics,Atomic and Molecular Physics, and Optics,Electronic, Optical and Magnetic Materials

Reference18 articles.

1. Consistent model for the hot-carrier degradation in n-channel and p-channel MOSFET's;Heremans;IEEE Trans. Electron Devices,1988

2. Design in hot-carrier reliability for higher performance logic applications;Fang,1998

3. Universality of NBTI – From Devices to Circuits and Products;Mahapatra,2014

4. Accurate Product Lifetime Predictions Based on Device-level Measurements;Nigam,2009

5. Assessing Device Reliability Margin in Scaled CMOS Technologies Using Ring Oscillator Circuits;Kerber,2017

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1. Ring Oscillator Aging Characterization in Conventional CMOS Technologies;2023 37th Symposium on Microelectronics Technology and Devices (SBMicro);2023-08-28

2. Voltage Ramp Stress Test Optimization for Wafer Level Hot Carrier Monitoring in FinFET;2023 IEEE International Reliability Physics Symposium (IRPS);2023-03

3. Decoupling of NBTI and Pure HCD Contributions in p-GAA SNS FETs Under Mixed VG/VD Stress;2022 IEEE International Reliability Physics Symposium (IRPS);2022-03

4. Degraded power MOSFET effects on Class-A power amplifier: Modelling studies considering feedback;Microelectronics Reliability;2021-07

5. Reliability Characterization of Ring Oscillator Circuits for Advanced CMOS Technologies;IEEE Transactions on Device and Materials Reliability;2020-06

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