Effectiveness of a hardware-based approach to detect resistive-open defects in SRAM cells under process variations-Reference-Cited by-同舟云学术

Effectiveness of a hardware-based approach to detect resistive-open defects in SRAM cells under process variations

Published:2016-12 Issue: Volume:67 Page:150-158
ISSN:0026-2714
Container-title:Microelectronics Reliability
language:en
Short-container-title:Microelectronics Reliability

Author:

Gomez A.F.,Lavratti F.,Medeiros G.,Sartori M.,Poehls L. Bolzani,Champac V.,Vargas F.

Funder

CONACYT

CNPq

FAPERGS

CAPES

Publisher

Elsevier BV

Subject

Electrical and Electronic Engineering,Surfaces, Coatings and Films,Safety, Risk, Reliability and Quality,Condensed Matter Physics,Atomic and Molecular Physics, and Optics,Electronic, Optical and Magnetic Materials

Reference20 articles.

1. CMOS SRAM Circuit Design and Parametric Test in Nano-Scaled Technologies: Process-Aware SRAM Design and Test;Pavlov,2008

2. Defect-Oriented Testing for Nano-Metric CMOS VLSI Circuits:;Sachdev,2007

3. Using march tests to test SRAMs;Goor;IEEE Des. Test Comput.,1993

4. Resistive-open defects in embedded-SRAM core cells: analysis and march test solution;Dilillo,2004

5. Testing for resistive opens and stuck opens;Li,2001

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