Atomic layer annealing for spatial tailoring in sub-4 nm AlN RRAM devices with low-voltage operation

Author:

Ling Chen-Hsiang,Yu Teng-Wei,Chuang Chun-Ho,Mo Chi-Lin,Shyue Jing-Jong,Chen Miin-Jang

Funder

Taiwan Semiconductor Manufacturing Company

National Science and Technology Council

Publisher

Elsevier BV

Reference46 articles.

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2. Effects of film orientation on power consumption, thermal stability, and reliability of aluminum nitride resistive random access memory devices;Lin;IEEE Trans. Electron Devices,2019

3. Nanoionics-based resistive switching memories, in: nanoscience and technology: a collection of reviews from nature journals;Waser;World Sci.,2010

4. Reliable multistate data storage with low power consumption by selective oxidation of pyramid-structured resistive memory;Kim;ACS Appl. Mater. Interfaces,2017

5. Good endurance and memory window for Ti/HfOx pillar RRAM at 50-nm scale by optimal encapsulation layer;Chen;IEEE Electron Device Lett.,2011

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