Overview of Cu contamination during integration in a dual damascene architecture for sub-quarter micron technology-Reference-Cited by-同舟云学术

Overview of Cu contamination during integration in a dual damascene architecture for sub-quarter micron technology

Published:2000-01 Issue:1-4 Volume:50 Page:425-431
ISSN:0167-9317
Container-title:Microelectronic Engineering
language:en
Short-container-title:Microelectronic Engineering

Author:

Torres J,Palleau J,Tardif F,Bernard H,Beverina A,Motte P,Pantel R,Juhel M

Publisher

Elsevier BV

Subject

Electrical and Electronic Engineering,Surfaces, Coatings and Films,Condensed Matter Physics,Atomic and Molecular Physics, and Optics,Electronic, Optical and Magnetic Materials

Reference4 articles.

1. Proceedings of VMIC Santa Clara;Gravier,1996

2. Proceedings of Advanced Metalization and Interconnect Systems for ULSI Applications in 1996;Dubin,1997

3. Wet cleanings adapted to backend processes

4. Cleaning of CHF 3 Plasma‐Etched SiO2/SiN/Cu Via Structures with Dilute Hydrofluoric Acid Solutions

Cited by 4 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. A comparative analysis of different measurement techniques to monitor metal and organic contamination in silicon device processing;physica status solidi (a);2015-02-25

2. Remote H2/N2 plasma processes for simultaneous preparation of low-k interlayer dielectric and interconnect copper surfaces;Journal of Vacuum Science & Technology B, Nanotechnology and Microelectronics: Materials, Processing, Measurement, and Phenomena;2012-05

3. Study of beveled angle effect on morphology of dual damascene via filling using ionized physical vapor deposition;Journal of Vacuum Science & Technology B: Microelectronics and Nanometer Structures;2003

4. Interaction Forces Between Silica Particles and Wafer Surfaces during Chemical Mechanical Planarization of Copper;Journal of The Electrochemical Society;2003