Challenges for high performance and very low power operation at the end of the Roadmap

Author:

Balestra Francis

Funder

Nanoelectronics Roadmapping and the Sinano Institute

Publisher

Elsevier BV

Subject

Materials Chemistry,Electrical and Electronic Engineering,Condensed Matter Physics,Electronic, Optical and Magnetic Materials

Reference14 articles.

1. Nanoscale CMOS: innovative materials, modeling and characterization;Balestra,2010

2. Beyond CMOS nanodevices (tomes 1 et 2);Balestra,2014

3. Double-gate silicon-on-insulator transistor with volume inversion: a new device with greatly enhanced performance;Balestra;IEEE Electron Device Lett,1987

4. Ultimate device scaling: intrinsic performance comparisons of carbon-based, InGaAs, and Si field-effect transistors for 5 nm gate length;Luisier,2011

5. Performance evaluation and design considerations of 2D semiconductor based FETs for sub-10 nm VLSI;Cao,2014

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