Subthreshold behavior of triple-gate MOSFETs on SOI material-Reference-Cited by-同舟云学术

Subthreshold behavior of triple-gate MOSFETs on SOI material

Published:2004-04 Issue:4 Volume:48 Page:529-534
ISSN:0038-1101
Container-title:Solid-State Electronics
language:en
Short-container-title:Solid-State Electronics

Author:

Lemme M.C.,Mollenhauer T.,Henschel W.,Wahlbrink T.,Baus M.,Winkler O.,Granzner R.,Schwierz F.,Spangenberg B.,Kurz H.

Publisher

Elsevier BV

Subject

Materials Chemistry,Electrical and Electronic Engineering,Condensed Matter Physics,Electronic, Optical and Magnetic Materials

Reference13 articles.

1. The international technology roadmap for semiconductors, 2001, http://public.itrs.net/

2. Extreme scaling with ultra-thin Si channel MOSFETs;Doris;Tech. Dig., IEDM,2002

3. Triple-self-aligned, planar double-gate MOSFETs: devices and circuits;Guarini;Tech. Dig., IEDM,2001

4. SON (silicon-on-nothing) p-MOSFETs with totally silicided (CoSi2) polysilicon on 5 nm-thick Si-films: the simplest way to integration of metal gates on thin FD channels;Monfray;Tech. Dig., IEDM,2002

5. FinFET scaling to 10 nm gate length;Yu;Tech. Dig., IEDM,2002

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