On the feasibility of DoS-engineering for achieving sub-60 mV subthreshold slope in MOSFETs
Author:
Publisher
Elsevier BV
Subject
Materials Chemistry,Electrical and Electronic Engineering,Condensed Matter Physics,Electronic, Optical and Magnetic Materials
Reference10 articles.
1. Lateral heterostructure field-effect transistors based on two-dimensional material stacks with varying thickness and energy filtering source;Marin;ACS Nano,2020
2. Design and simulation of steep-slope silicon cold source FETs with effective carrier distribution model;Gan;IEEE Trans Electron Devices,2020
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1. Electron-phonon scattering in two-dimensional Dirac-source transistors;Physical Review Applied;2024-08-26
2. Bias-independent subthreshold swing in ballistic cold-source field-effect transistors by drain density-of-states engineering;Applied Physics Letters;2024-01-29
3. Three-Dimensional Cold Metals in Realizing Steep-Slope Transistors Based on Monolayer MoS2;IEEE Electron Device Letters;2023-10
4. Cold source field-effect transistors: Breaking the 60-mV/decade switching limit at room temperature;Physics Reports;2023-04
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