1. Cho SL, Yi JH, Ha YH, Kuh BJ, Lee CM, Park JH et al., Highly scalable on-axis confined cell structure for high density PRAM beyond 256Mb. Symp VLSI Tech Dig, 2005. pp. 96–97.
2. Ahn SJ, Hwang YN, Song YJ, Lee SH, Lee SY, Park JH et al., Highly reliable 50nm contact cell technology for 256Mb PRAM. Symp VLSI Tech Dig, 2005. pp. 98–99.
3. Chalcogenide memory arrays: characterization and radiation effects;Maimon;IEEE Trans Nuc Sci,2003
4. Burcin L, Ramaswamy S, Hunt KK, Maimon JD, Conway TJ, Li B et al., A 4-Mbit non-volatile chalcogenide random access memory. IEEE Aerospace Conference, 2005; pp. 1–8.
5. Switching and programming dynamics in phase-change memory cells;Ielmini;Solid-State Electron,2005