How crucial is back gate misalignment/oversize in double gate MOSFETs for ultra-low-voltage analog/rf applications?

Author:

Kranti Abhinav,Armstrong G. Alastair

Publisher

Elsevier BV

Subject

Materials Chemistry,Electrical and Electronic Engineering,Condensed Matter Physics,Electronic, Optical and Magnetic Materials

Reference40 articles.

1. International technology roadmap for semiconductor 2006 edition .

2. Analysis of static and dynamic performance of short channel double gate SOI MOSFETs for improved cut-off frequency;Kranti;Jap J Appl Physics,2005

3. Double-gate silicon-on-insulator transistor with volume inversion: a new device with greatly enhanced performance;Balestra;IEEE Electron Device Lett,1987

4. Experimental evaluation of carrier transport and device design for planar symmetric/asymmetric double-gate/ground-plane CMOSFETs;Ieong;IEDM Tech Dig,2001

5. The vertical replacement gate (VRG) MOSFET: a 50nm vertical MOSFET with lithography independent gate length;Hergenrother;IEDM Tech Dig,1999

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