28 nm CMOS process ESD protection based on diode-triggered silicon controlled rectifier

Author:

Li Xiang,Dong Shurong,Jin Hao,Miao Meng,Hu Tao,Guo Wei,Wong Hei

Funder

National Natural Science Foundation of China

Fundamental Research Funds for Central Universities

Science and Technology Plan of Zhejiang Province

Research Grants Council of Hong Kong

Publisher

Elsevier BV

Subject

Materials Chemistry,Electrical and Electronic Engineering,Condensed Matter Physics,Electronic, Optical and Magnetic Materials

Reference13 articles.

1. Ginawi A, Xia T, Gauthier R. Reducing the turn-on time and overshoot voltage for a diode-triggered silicon-controlled rectifier during an electrostatic discharge event. In: System-on-chip conference (SOCC), 2014 27th IEEE international. IEEE, 2014. p. 109–14.

2. A systematic study of ESD protection co-design with high-speed and high-frequency ICs in 28 nm CMOS;Lu;IEEE Trans Circuits Syst I Regul Pap,2016

3. Lin CY, Ker MD, Chang PH, Wang WT. Study on the ESD-induced gate-oxide breakdown and the protection solution in 28nm high-k metal-gate CMOS technology. In: Nanotechnology materials and devices conference (NMDC), 2015 IEEE. IEEE, 2015. p. 1–4.

4. Courivaud B, Nolhier N, Ferru G, Bafleur M, Caignet F. Novel 3D back-to-back diodes ESD protection. In: Electrical overstress/electrostatic discharge symposium (EOS/ESD), 2014 36th. IEEE, 2014. p. 1–8.

5. Mergens M, Russ C, Verhaege K, Armer J, Jozwiak P, Mohn R, et al. Diode-triggered SCR (DTSCR) for RF-ESD protection of BiCMOS SiGe HBTs and CMOS ultra-thin gate oxides. In: Electron devices meeting, 2003. IEDM'03 technical digest. IEEE international. IEEE, 2003. p. 21.3.1–21.3.4.

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