Funder
National Natural Science Foundation of China
Subject
Materials Chemistry,Electrical and Electronic Engineering,Condensed Matter Physics,Electronic, Optical and Magnetic Materials
Reference17 articles.
1. Dong AH, Xiong J, Mitra S, Liang W, Gauthier R, Loiseau A. Comprehensive study of ESD design window scaling down to 7nm technology node. In 2018 40th Electrical Overstress/Electrostatic Discharge Symposium (EOS/ESD), Reno, NV, USA; 2018. pp. 1–8. doi:10.23919/EOS/ESD.2018.8509689.
2. Optimized pMOS-triggered bidirectional SCR for low-voltage ESD protection applications;Wang;IEEE Trans Electron Devices,2014
3. Design of a NMOS-triggered SCR for dual-direction low-voltage ESD protection;Xia;Solid State Electron,2022
4. Characterizing diodes for RF ESD protection;Chen;IEEE Electron Device Lett,2004
5. 28nm CMOS process ESD protection based on diode-triggered silicon controlled rectifier;Li;Solid-State Electron,2017
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